1. Field of the Invention
The present invention relates to a new architecture for the implementation of radar displays, and more particularly to a mixed architecture superposing a PPI (Plan Position Indicator) type display on a raster display.
2. Description of the Background
Echo receiving systems such as radar and sonar usually comprise three fundamental elements:
(a) a cathode ray tube (CRT) that constitutes the interface device with the end user; PA0 (b) a circuit for processing the echo-radar signal coming from the receiver. This circuit can modulate the brightness of the CRT electronic beam according to the received signal; PA0 (c) a circuit for deflecting the electronic beam of the (CRT) which allows, through a mechanism of temporal scanning ("sweeps"), the building of an image on the screen according to the information provided by the above-described processing circuit. PA0 fully analog display systems which we will indicate as "ANALOG ARCHITECTURE"; PA0 fully digital display systems which we will indicate as "DIGITAL ARCHITECTURE". PA0 the double beam CRT display system which we will indicate as "DOUBLE BEAM ARCHITECTURE". PA0 (a) The resolution on the polar plane is the same as that obtained by the "ANALOG ARCHITECTURE", that is, very high and limited only by video amplifier bandwidth, spot size and phosphor granularity. PA0 (b) The resolution on the cartesian plane is irrelevant. PA0 (c) A relative position error can be defined. It consists of the error made by an object moving on the cartesian plane which tries to superimpose itself on a point on the polar plane. PA0 (d) The amount of memory required in the cartesian plane by this type of architecture, to obtain a given angular and radial resolution, so that one can satisfactorily pinpoint a target, can be easily derived according to the tables of FIGS. 2 and 4.
A major problem arises in carrying out such systems because, due to operating requirements, it is necessary to display not only the sweeping image which is derived from an analog signal, but also alphanumeric and graphic information which representation is well-suited for a digital display system.
In other words, the radar signal is intrinsically of a polar (analog) type, while legends and vectors are managed by a processor in an intrinsically cartesian (digital) way.
Prior art radar display systems can be divided into three categories:
In the case of "ANALOG ARCHITECTURE" systems only the radar echo signal is displayed on the screen in polar coordinates. Since every picture is composed of a finite sweep number, the obtained resolution is maximum at the center of the display screen and minimum near the screen boundary.
The dead time between two sweeps can be used to draw symbols and/or vectors. Normally these symbols are refreshed during such lead times in a cyclic sequence. The persistence time of the (CRT) phosphors places a limit on the maximum number of symbols and/or vectors which can be displayed, due to the flickering effect.
Therefore, although "ANALOG ARCHITECTURE" systems are simple in design because the systems maintain the polar nature of the information, difficulties arise when complex symbols or alphanumeric drawings have to be displayed.
In the case of "DIGITAL ARCHITECTURE" systems, the radar echo signal is sampled and stored in a digital memory which continuously outputs data to a CRT with a raster TV-like scan.
The "DIGITAL ARCHITECTURE" systems provide an image in which all the fields scanned by the antenna are constantly displayed at a uniform brightness. The "DIGITAL ARCHITECTURE" systems further allow easy drawing and/or symbol displays in a practically unbounded number. Furthermore, these systems allow the display of complex maps, and the use of colors.
Nevertheless, formatting an intrinsically polar signal for a cartesian framework leads inevitably to some drawbacks.
For instance, the samples of the radar signal must be stored in memory in real time. As the memory is generally organized as a bi-dimensional cartesian array, extremely fast calculations of products like r cos .theta. and r sin .theta. (where r is the echo distance and .theta. is its bearing) is required. Since the video memory is also used by the circuitry generating vectors and/or symbols and by the raster-scan circuitry, extremely fast video memories are required in order to avoid overall system performance reduction. Typically this problem is resolved with costly specialized hardware.
Also, due to the obvious memory bank size limitations, the image resolution is usually lower than that attainable with the analog architecture because the latter is limited only by video amplifier bandwidth, spot size and phosphor granularity. Since a radar operator is mainly interested in the distance and the angular position of an echo, it is necessary to divide the resolution error into two components: the Angular Resolution and the Radial Resolution.
FIG. 1 shows a quadrant of a radar display superimposed on a video memory grid.
The angular resolution .DELTA..theta. is defined as the angle corresponding to the arc lying between two adjacent pixels (shaded cubes as shown in FIG. 1) on a circle of radius r. The angular resolution varies with respect to the distance from the center r and the angular position. In the worst case, at an angular position of 45.degree., it can be easily found that: ##EQU1## where R is the CRT radius and N is the total number of pixels which can be stored in video memory. Owing to the constant pixel density per unit area, the angular resolution is minimum at the center and maximum around the screen boundary. Indeed, it is possible to compute the amount of memory required to obtain a desired angular resolution at a distance of r=R/2 (typical) or r=R/10 (worst case). The results are shown in FIG. 2.
Note that the memory amount required to get an angular resolution of 0.5.degree. at R/2 is equal to about 51 Kilobytes per bit of pixel. Since a compromise must be struck between cost and memory size, an inevitable sampling error arises.
The radial resolution (Dr) is defined as the maximum distance between two adjacent pixels on a radius normalized to the CRT radius length (R). The radial resolution is, in the worst case: ##EQU2## where N is the total number of pixels in the pixel memory.
The pixel number, that is to say the memory amount required to get a desired radial resolution, can be easily derived. The results are shown in FIG. 3.
In practice, if two distinct points on a radius are separated from each other by only 0.3% of the CRT radius (about 500 meters in a 100 nautical mile range), a memory bank of about 109 Kilobytes per bit of information is required to resolve the points. In sum, the limit on symbols and/or vectors which can be displayed in an "ANALOG ARCHITECTURE" system, and the speed and memory required of a "DIGITAL ARCHITECTURE" system are significant problems.
A "DOUBLE BEAM ARCHITECTURE" has also been developed. This system uses both an "ANALOG ARCHITECTURE" system and a "DIGITAL ARCHITECTURE" system which generate two separate beams for driving a single CRT. The "DOUBLE BEAM ARCHITECTURE" is characterized by remarkable costs due to the necessity of employing special-purpose and/or particularly sophisticated components, so that it is only employed where the cost is less important than the maximum degree of safety.